Contents

Russian Microelectronics

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Vol. 48, No. 3, 2019

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Multilevel Bipolar Memristor Model Considering Deviations of Switching Parameters in the Verilog-A Language

G. S. Teplov and E. S. Gornev p. 131  abstract

Logical C-Element on STG DICE Trigger for Asynchronous Digital Devices Resistant to Single Nuclear Particles

Yu. V. Katunin and V. Ya. Stenin p. 143  abstract

Monte Carlo Simulation of Defects of a Trench Profile in the Process of Deep Reactive Ion Etching of Silicon

M. K. Rudenko, A. V. Myakon’kikh and V. F. Lukichev p. 157  abstract

Methods and Algorithms for the Logical-Topological Design of Microelectronic Circuits at the Valve and Inter-Valve Levels for Promising Technologies with a Vertical Transistor Gate

G. A. Ivanova, D. I. Ryzhova, S. V. Gavrilov, N. O. Vasilyev and A. L. Stempkovskii p. 167  abstract

Layout Synthesis Design Flow for Special-Purpose Reconfigurable Systems-on-a-Chip

S. V. Gavrilov, D. A. Zheleznikov, M. A. Zapletina, V. M. Khvatov, R. Zh. Chochaev and V. I. Enns p. 176  abstract

Extracting a Logic Gate Network from a Transistor-Level CMOS Circuit

D. I. Cheremisinov and L. D. Cheremisinova p. 187  abstract

Reflection Spectra Modification of Diazoquinone-Novolak Photoresist Implanted with B and P Ions

D. I. Brinkevich, A. A. Kharchenko, V. S. Prosolovich, V. B. Odzhaev, S. D. Brinkevich and Yu. N. Yankovskii p. 197  abstract

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