Research of Dynamics of a Gated Balanced Comparator

E. Beiner and K. Krumin’sh

Institute of Electronics and Computer Science,

Dzerbenes 14, Riga, LV-1006 Latvia

e-mail: beiners@edi.lv, krumins@edi.lv

Received June 30, 2011

Abstract—The results are presented of the research of the dynamics of a gated balanced comparator on
tunnel diodes in the mode of sampling signal transformation. A tunnel diode has been used as a shaper
of the gating voltage drop. The dynamic properties of the comparator are characterized by the step
response time of the sampling converter built on this comparator. A modification of the comparator cir-
cuit is also investigated that extends the range of the allowed values of the resistance in the circuit of the
clock signal. The model of the tunnel diodes takes into account the p-n junction capacitance, the spread-
ing resistance, and the parasitic inductance of the diodes. The research was conducted using the SPICE
simulation program. The simulation results are compared with the theoretical calculations.

Keywords: gated comparator, balanced comparator, tunnel diode, sampling transformation, transient
response

DOI: 10.3103/S0146411611060034

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